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sinage issue
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1 changed files with 5 additions and 5 deletions
10
rtl/tb.vhdl
10
rtl/tb.vhdl
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@ -90,11 +90,11 @@ begin
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btn <= std_logic_vector(to_signed(btn_i, 32));
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ffi_set_outputs(
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to_integer(unsigned(clean_slv(led))),
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to_integer(unsigned(clean_slv(seg0))),
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to_integer(unsigned(clean_slv(seg1))),
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to_integer(unsigned(clean_slv(seg2))),
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to_integer(unsigned(clean_slv(seg3)))
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to_integer(signed(clean_slv(led))),
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to_integer(signed(clean_slv(seg0))),
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to_integer(signed(clean_slv(seg1))),
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to_integer(signed(clean_slv(seg2))),
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to_integer(signed(clean_slv(seg3)))
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);
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end loop;
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end process;
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