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https://github.com/ParkerTenBroeck/hdl_sim.git
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parent
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commit
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9 changed files with 156 additions and 63 deletions
36
rtl/tb.vhdl
36
rtl/tb.vhdl
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@ -2,20 +2,22 @@ library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity tb is
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end entity;
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architecture sim of tb is
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signal clk : std_logic := '0';
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signal key : std_logic_vector(31 downto 0) := (others => '0');
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signal btn : std_logic_vector(31 downto 0) := (others => '0');
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signal sw : std_logic_vector(31 downto 0) := (others => '0');
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signal led : std_logic_vector(31 downto 0) := (others => '0');
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signal hex : std_logic_vector(31 downto 0) := (others => '0');
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signal seg0 : std_logic_vector(31 downto 0) := (others => '0');
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signal seg1 : std_logic_vector(31 downto 0) := (others => '0');
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signal seg2 : std_logic_vector(31 downto 0) := (others => '0');
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signal seg3 : std_logic_vector(31 downto 0) := (others => '0');
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-- Foreign subprograms MUST be declared in the declarative region (here),
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-- and MUST have a body (even dummy) to satisfy VHDL.
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procedure ffi_init is
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begin
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end procedure;
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@ -29,13 +31,13 @@ architecture sim of tb is
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attribute foreign of ffi_get_sw : function is
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"VHPIDIRECT ffi_get_sw";
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function ffi_get_key return integer is
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function ffi_get_btn return integer is
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begin
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return 0;
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end function;
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attribute foreign of ffi_get_key : function is "VHPIDIRECT ffi_get_key";
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attribute foreign of ffi_get_btn : function is "VHPIDIRECT ffi_get_btn";
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procedure ffi_set_outputs(led_i : integer; hex_i : integer) is
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procedure ffi_set_outputs(led_i: integer; seg0_i: integer; seg1_i: integer; seg2_i: integer; seg3_i: integer) is
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begin
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end procedure;
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attribute foreign of ffi_set_outputs : procedure is
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@ -58,10 +60,13 @@ begin
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dut: entity work.circuit
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port map (
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clk => clk,
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key => key,
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btn => btn,
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sw => sw,
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led => led,
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hex => hex
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seg0 => seg0,
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seg1 => seg1,
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seg2 => seg2,
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seg3 => seg3
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);
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-- 500 Hz clock (2 ms period)
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@ -69,7 +74,7 @@ begin
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process
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variable sw_i : integer;
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variable key_i : integer;
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variable btn_i : integer;
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begin
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ffi_init;
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wait for 0 ns;
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@ -79,14 +84,17 @@ begin
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wait for 0 ns;
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sw_i := ffi_get_sw;
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key_i := ffi_get_key;
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btn_i := ffi_get_btn;
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sw <= std_logic_vector(to_signed(sw_i, 32));
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key <= std_logic_vector(to_signed(key_i, 32));
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btn <= std_logic_vector(to_signed(btn_i, 32));
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ffi_set_outputs(
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to_integer(unsigned(clean_slv(led))),
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to_integer(unsigned(clean_slv(hex)))
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to_integer(unsigned(clean_slv(seg0))),
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to_integer(unsigned(clean_slv(seg1))),
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to_integer(unsigned(clean_slv(seg2))),
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to_integer(unsigned(clean_slv(seg3)))
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);
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end loop;
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end process;
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