mirror of
https://github.com/ParkerTenBroeck/hdl_sim.git
synced 2026-06-06 21:24:06 -04:00
added verilog support
This commit is contained in:
parent
5746846896
commit
c3a3e89082
20 changed files with 633 additions and 88 deletions
|
|
@ -10,8 +10,13 @@
|
|||
<main class="grid">
|
||||
<section id="editorSection" class="card editor">
|
||||
<div class="cardHeader">
|
||||
<div class="cardTitle">VHDL</div>
|
||||
<div class="cardTitle">HDL</div>
|
||||
<div class="cardActions">
|
||||
<label class="editorLanguageLabel" for="editorLanguage">Language</label>
|
||||
<select id="editorLanguage" class="editorLanguageSelect" aria-label="Select HDL language">
|
||||
<option value="vhdl">VHDL</option>
|
||||
<option value="verilog">Verilog</option>
|
||||
</select>
|
||||
<button id="loadExampleBtn" class="secondary">Load example</button>
|
||||
</div>
|
||||
</div>
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue